AMD introduces third-gen Epyc Milan-X server CPUs with up to 768MB of L3 cache

Codenamed Milan-X, these new chips will feature the same capabilities and features as existing third-gen Epyc processors, albeit with three times the amount of L3 cache. At the top tier, this works out to 768MB of L3 cache and up to 804MB of total cache per socket.

AMD at Computex earlier this year teased next-gen 3D chiplet technology it developed in collaboration with Taiwan Semiconductor Manufacturing Company. During the company’s virtual Accelerated Data Center Premiere event on Monday, AMD announced it would be bringing this new technology to the data center.

When architecting Milan-X, AMD studied how technical computing applications behaved, and found that a large amount of cache was key to obtaining higher performance. This keeps data closer to the cores, thus reducing overall system latency.

Su said Milan-X chips are the fastest server processors for technical computing workloads, offering more than a 50 percent uplift compared to standard Milan processors. What’s more, they support Socket SP3, will be drop-in compatible with existing boards with a simple BIOS update, and take advantage of today’s software with no changes required.

Third-gen AMD Epyc CPUs with 3D V-Cache are scheduled to launch in the first quarter of 2022. Cisco, Dell, Lenovo, HPE and Supermicro have already partnered with AMD and will be offering server solutions utilizing these processors when the time comes.

If you can’t wait that long, Microsoft Azure HPC has virtual machines featuring the new chips available from today in private preview with a broader rollout slated for the coming weeks.

Share value in AMD is up more than 10 percent on the day.